EE6301
Digital
Logic Circuits, Second year, Department
of Electrical and Electronics Engineering, Model Exam Questions
PART A – (10 x 2 = 20 Marks)
1.
Define
Fan-in and Fan-out characteristics of digital logic families.
2.
What
are the advantages of ECL logic families?
3.
Show
that x’y’z+x’yz+xy’=x’z+xy’
4.
Draw
the truth table and logic circuit for half adder.
5.
Compare
Moore model and Melay model of synchronous sequential logic circuits.
6.
Give
the characteristic equation and state diagram of JK flipflop.
7.
State
the hazards in asynchronous sequential circuits.
8.
Define
races in asynchronous sequential logic circuits.
9.
What
are the various VHDL operators used?
10.
What
is the purpose of test bench in VHDL?
PART
B – (05 x 13 = 65 Marks)
11.
a)
Explain briefly about the following. i) BCD codes ii) Gray Codes iii)
Error detecting and correcting codes with examples. (13)
OR
b)
Explain the basic working of TTL totem pole arrangement and CMOS logic families
with examples. (13)
12.
a)
Design and implement BCD to Excess-3 Code Converter. (13)
OR
b)i)
Simplify using K-map g(w,x,y,z)=Σm(1,3,4,6,11)+Σd(0,8,10,12,13) (5)
ii) Implement the function f(A,B,C)=Σm(0,3,5)
using 8:1 mux and 4:1 mux. (8)
13.
a)
Design BCD counter using T-flipflop. (13)
OR
b)
Draw the state diagrams derive the state equation and draw the clocked
sequential circuit for the following state table using JK flipflop. (13)
Present State
|
Next State
|
Output
|
||
X=0
|
X=1
|
X=0
|
X=1
|
|
AB
|
AB
|
AB
|
Y
|
Y
|
00
|
00
|
01
|
0
|
0
|
01
|
11
|
01
|
0
|
0
|
10
|
10
|
00
|
0
|
0
|
11
|
10
|
11
|
0
|
0
|
14. a) Describe the steps involved in
design of asynchronous sequential circuit in detail with an example. (13)
OR
b) i)
Explain various hazards that will occur in asynchronous sequential circuit. (8)
ii) Implement the following Boolean function
with a PLA f1(A,B,C)=Σ(0,1,2,4) , f2(A,B,C)=Σ(0,5,6,7) (5)
15. a) i) Write a HDL program for
full adder . (5)
ii)
Explain the test bench concept in VHDL . (8)
OR
b) Write the VHDL
code for 2X1 Mux. (13)
PART
C – (01 x 15 = 15 Marks)
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